Verification01
Reusable UVM Verification Architecture
A practical engineering view of reusable agents, stimulus, checking, assertions, coverage and regression structure.
Read the engineering reference →Practical semiconductor engineering perspectives.
A technical content channel for verification, physical implementation, protocols, SoC and engineering execution.
Physical Design02
Timing, Congestion & Sign-Off Closure
How physical implementation teams can structure closure around timing, congestion, physical verification and sign-off.
Read the engineering reference →Protocol Verification03
PCIe Data Link Layer Verification
Key verification concerns around flow control, replay, error recovery and coverage closure.
Read the engineering reference →Turn engineering knowledge into trusted content.
Future posts can be published here after technical review, confidentiality checks and approval for external publication.