01
Technical workstreams
Own defined engineering scope, milestones and closure.
Build the silicon. Own the problem. Grow with AionSi.
We are building experienced engineering teams for technically demanding semiconductor programs. Bring depth in your discipline and take ownership from engineering execution through closure.
Experienced engineers can own defined workstreams, technical decisions and delivery outcomes across the semiconductor lifecycle.
Senior Engineers
Technical Leads
Principal Engineers
Engineering Managers
Deep engineering, not generic delivery.
AionSi teams work on real silicon engineering problems across verification, implementation, test and system integration.
01
SoC Design Verification
02
Emulation
03
Physical Verification
04
Design Verification
05
Physical Design
06
DFT
07
Digital Marketing for Semiconductor Technology
02
Customer programs
Work directly on demanding semiconductor programs and deliverables.
03
Architecture & methodology
Shape engineering decisions, flows, reviews and quality practices.
04
Technical leadership
Mentor engineers and raise execution quality across the team.
Current engineering opportunities.
These roles reflect the current approved hiring requirements. AionSi may update openings as the engineering roadmap evolves.
10+ years
SoC DV Manager
Hyderabad
Lead SoC design verification programs with strong team leadership, verification strategy and delivery ownership.
CORE RESPONSIBILITIES
- •Lead SoC design verification strategy, execution and closure.
- •Own verification planning, technical reviews, debug and delivery milestones.
- •Build and mentor a strong design verification engineering team.
REQUIRED / PREFERRED
SoC Design VerificationSystemVerilog / UVMTechnical LeadershipVerification Closure
3+ years
Emulation Engineer
Hyderabad
Join the emulation team to develop, debug and execute complex SoC emulation flows.
CORE RESPONSIBILITIES
- •Work on SoC emulation environments and execution flows.
- •Debug emulation failures and collaborate with design and verification teams.
- •Contribute to reliable emulation bring-up and execution methodology.
REQUIRED / PREFERRED
EmulationSoC VerificationDebugSemiconductor Design Flows
2–5 years
Digital Marketing Executive
Bengaluru
Build digital visibility and demand-generation programs for AionSi in the semiconductor technology market.
CORE RESPONSIBILITIES
- •Execute digital marketing programs across relevant channels.
- •Create and coordinate semiconductor-focused content and campaigns.
- •Support lead generation, analytics and campaign performance tracking.
REQUIRED / PREFERRED
Digital MarketingB2B Technology MarketingContent & CampaignsSemiconductor / Technology
5–8 years
Physical Verification Engineer
Bengaluru and Hyderabad
Own sign-off physical verification for advanced-node designs and ensure tape-out-ready quality.
CORE RESPONSIBILITIES
- •Perform DRC, LVS and ERC verification for advanced technology nodes.
- •Drive physical sign-off checks and closure toward tape-out.
- •Work closely with design, layout and foundry teams to resolve verification issues.
REQUIRED / PREFERRED
DRCLVSERCPhysical Sign-offAdvanced Technology Nodes
5+ years
DV Engineer
Bengaluru
Develop and debug UVM-based verification environments and drive regression and coverage closure.
CORE RESPONSIBILITIES
- •Develop and maintain UVM testbenches.
- •Debug regressions and verification failures.
- •Drive functional coverage closure and verification deliverables.
REQUIRED / PREFERRED
SystemVerilogUVMAMBA ProtocolsRegression DebugCoverage Closure
5+ years
Physical Design III
Bengaluru
Own physical-design execution from planning through tape-out, including implementation, verification, reviews and technical leadership.
CORE RESPONSIBILITIES
- •Deliver fully verified physical designs at IP and top-level.
- •Manage the physical-design phase from planning and requirements through tape-out.
- •Own documentation, reviews, quality, progress and technical coordination.
- •Lead physical designers and participate in improvement and knowledge-driven meetings.
REQUIRED / PREFERRED
CadenceVirtuosoPhysical DesignHigh Frequency / mmWaveTechnical Leadership
4+ years
DFT Engineer
Location to be confirmed
Execute DFT insertion, MBIST, JTAG, ATPG and manufacturing-test verification flows.
CORE RESPONSIBILITIES
- •Hands-on MBIST and JTAG insertion.
- •Pattern generation and simulation.
- •RTL DFT insertion using Siemens Tessent-based flows.
- •Verification for MBIST, repair and boundary-scan tests.
- •Support scan and ATPG activities.
REQUIRED / PREFERRED
MBISTJTAGATPGScanSiemens TessentDFT Verification
Bring your engineering depth.
Tell us your semiconductor discipline, experience level and the kind of engineering problems you want to work on.